Verilink PRISM 4051 (34-00253.2) Product Manual Instrukcja Użytkownika Pobierz pdf (Strona 18)

12 C

HAPTER

2: I

NSTALLATION

The NMS address, port rate, and power

up configuration mode may be set by

either configuration switches or

through software control. The physical

connection is 6-pin modular connector

with the pinouts for these connectors

shown in Table 2-16. This port is a

serial RS-232 DCE port configured for

eight bits, no parity, and one stop bit.

Data Port

Connections

Both models of the

Verilink 1051 chassis

provide connection to the

customer equipment. Each

slot of the 1051-2 has a

corresponding DTE 8-pin

RJ-48 connector and a

high-speed DTE female

25-pin connector located

on the chassis rear panel.

The 1051-3 chassis is

similar except that it has a

high-speed DTE 34-pin

connector instead of the

25-pin connector. The

pinout for the DTE RJ-48

connector is given in

Table 2-17 and the pinout

for the high-speed DTE

connectors is given in

Table 2-18.

FCC rules require that interconnecting cables carrying high-speed data be shielded

appropriately to minimize radio frequency interference.

Table 2-16 NMS Port Connector Pinouts

Pin NMS Bus IN NMS Bus OUT

1 Not Used Not Used

2 Signal Ground Signal Ground

3 Data Out Data Out

4 Data In Not Used

5 Signal Ground Signal Ground

6 Not Used Not Used

Table 2-17 DTE RJ-48 Pinout

Pin Signal

1Data Out

2Data Out

3Not Used

4Data In

5Data In

6Not Used

7, 8 Chassis Ground

Table 2-18 High-Speed DTE Connector Pinout

ITU/EIA

Circuit Common Name

DB-25

25-pin

V.35

34-pin DCE

101/AA Frame Ground 1 A Gnd

102/AB Signal Ground 7 B Gnd

103/BA (A) Transmit Data A 2 P In

103/BA (B) Transmit Data B 14 S In

104/BB (A) Receive Data A 3 R Out

104/BB (B) Receive Data B 16 T Out

105/CA Request to Send 4 C In

106/CB Clear to Send 5 D Out

107/CC Data Set Ready 6 E Out

108/CD Data Term Ready 20 H In

109/CF Data Carrier

Detect

8FOut

114/DB (A) Transmit Clock A 15 Y Out

114/DB (B) Transmit Clock B 12 AA Out

115/DD (A) Receive Clock A 17 V Out

115/DD (B) Receive Clock B 9 X Out

113/DA (A) External Clock A 24 U In

113/DA (B) External Clock B 11 W In

141/LLB Local Loopback 18 J In

140/RLB Remote Loopback 21 BB In

142/TM Test Mode 25 K Out

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 47 48

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